Inductorless CMOS Receiver Front-End Circuits for 10-Gb/s Optical Communications

Hsin-Liang Chen; Chih-Hao Chen; Wei-Bin  Yang; Jen-Shiun  Chiang

doi:10.6180/jase.2009.12.4.09

Inductorless CMOS Receiver Front-End Circuits for 10-Gb/s Optical Communications

Hsin-Liang Chen This email address is being protected from spambots. You need JavaScript enabled to view it.¹, Chih-Hao Chen¹, Wei-Bin Yang¹ and Jen-Shiun Chiang¹

¹Department of Electrical Engineering, Tamkang University, Tamsui, Taiwan 251, R.O.C.

Received: November 7, 2008
Accepted: February 11, 2009
Publication Date: December 1, 2009

Download Citation: ||https://doi.org/10.6180/jase.2009.12.4.09

ABSTRACT

In this paper, a 10-Gb/s inductorless CMOS receiver front end is presented, including a transimpedance amplifier and a limiting amplifier. The transimpedance amplifier incorporates Regulated Cascode (RGC), active-inductor peaking, and intersecting active feedback circuits to achieve a transimpedance gain of 56 dBΩ and a bandwidth of 8.27 GHz with a power dissipation of 35 mW. The limiting amplifier employs interleaving active feedback to achieve a differential voltage gain of 44.5 dB and a bandwidth of 10.3 GHz while consuming 226 mW. Both circuits are realized in 0.18-μm CMOS technology with a 1.8-V supply.

Keywords: Transimpedance Amplifier, Limiting Amplifier, Inducorless, Optical Communication

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