Yang-Han Lee 1, Jen-Shiun Chiang1 , Yeh-Hsih Chou1,2, Yu-Shih Lee1 , Hsien-Wei Tseng1 and Ming-Hsueh Chuang1
1Department of Electrical Engineering, Tamkang University, Tamsui, Taiwan 251, R.O.C.
2Department of Electronic Engineering, St. John’s University, Tamsui, Taiwan 251, R.O.C.
Received:
July 24, 2006
Accepted:
August 9, 2007
Publication Date:
September 1, 2008
Download Citation:
||https://doi.org/10.6180/jase.2008.11.3.10
ABSTRACT
In this paper, a scalable and subchannelizable innovative FFT architecture is proposed to provide with low-power and high-speed characteristics for SOFDMA application in IEEE 802.16 WiMAX communication and other fields that have features in SOFDMA applications. The scalability design uses multiplexing concept to build only one 1024-point and only one 2048-point FFT processors in an IEEE 802.16e and an IEEE 802.16-2004 WiMAX system respectively. The spirits of the subchannelization design are prohibited all of the unused arithmetic operations in the present inventive design to achieve low-power requirement when only a small subset of FFT outputs are of interests for a specific Subscriber Station in one session of a IEEE 802.16e or IEEE 802.16-2004 WiMAX systems. The SELDIF registry control methodology of the key control mechanism of the subchannelization design is also disclosed for the purposes of structure simplification and low-power/high-speed design in this paper. The performance on areas and power efficiency are analyzed based on MATLAB codes. A closed system platform is used to tune design parameters for chip implementation by using Agilent ADS tool.
Keywords:
FFT, SOFDMA, WiMAX, SELDIF, Scalable, Subchannelizable
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