Journal of Applied Science and Engineering

Published by Tamkang University Press


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Jen-Shiun Chiang  1, Hung-Da Chung1 and Min-Show1

1Tsai Department of Electrical Engineering Tamkang University Tamsui, Taipei, Taiwan


Received: November 18, 1999
Accepted: November 4, 2000
Publication Date: December 1, 2000

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A carry-free subtractive division algorithm is proposed in this paper. In the conventional subtractive divider, adders are used to find both quotient bit and partial remainder. Carries are usually generated in the addition operation, and it may take time to finish the operation, therefore, the carry propagation delay usually is a bottleneck of the conventional subtractive divider. In this paper, a carry-free scheme is proposed by using signed bit representation to represent both quotient and partial remainder. During the arithmetic operation, a special technique is used to decide the quotient bit, and the new partial remainder can be found further by a table lookup-like method. The signed bit format of the quotient can be converted by on-the-fly conversion to the binary representation. Based on this algorithm a 32-b/32-b divider is designed and implemented, and the simulation shows that the divider works well.

Keywords: Divider, radix-2, quotient bit, partial remainder, carry propagation delay, high speed, Svobota-Tung division algorithm, signed digit, prescaling, table look-up, on-the-fly conversion


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