Jen-Shiun Chiang This email address is being protected from spambots. You need JavaScript enabled to view it.1, Cheng-Chih Chien1, Jian-Kao Chen1 and Hsin-Guo Chou1

1Department of Electrical Engineering Tamkang University Tamsui, Taiwan 251, R.O.C.


 

Received: March 19, 2004
Accepted: June 30, 2004
Publication Date: December 1, 2004

Download Citation: ||https://doi.org/10.6180/jase.2004.7.4.07  


ABSTRACT


In this paper, a new efficient VLSI architecture to compute modular exponentiation and modular multiplication for Rivest-Shamir-Adleman (RSA) public-key cryptosystem is proposed. We modify the conventional H-algorithm to find the modular exponentiation. By this modified H-algorithm, the modular multiplication steps for n-bit numbers are reduced by 5n/18 times. For the modular multiplication a modified L-algorithm (LSB first) is used. In the architecture of the modified modular multiplication the iteration times are only half of Montgomery’s algorithm and the H-algorithm. The proposed architecture for the RSA public-key crypto-system has a data rate of 146 kb/s for 512-b words with a 200-MHz clock rate.


Keywords: Data Security, H-algorithm, L-algorithm, Modular Exponentiation, Modular Multiplication, Montgomery’s Algorithm, Public-key Cryptosystem, RSA, VLSI


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