Yang-Han Lee This email address is being protected from spambots. You need JavaScript enabled to view it.1, Yih-Guang Jan1 , Ming-Hsueh Chuang1 , Hsien-Wei Tseng1 , Liang-Lin Jau2 , Min-Ru Wen2 , Wei-Chen Li2 and Sheng-Kai Yu1
1Department of Electrical Engineering, Tamkang University, Tamsui, Taiwan 251, R.O.C. 2Department of Computer & Communication Engineering, St. John’s University, Tamsui, Taiwan 251, R.O.C.
Received: May 5, 2005 Accepted: June 20, 2005 Publication Date: March 1, 2006
In this paper we use Top-down method to design WLAN802.11a based Orthogonal Frequency Division Multiplexing (OFDM) Baseband Transceivers. In this paper we emphasize the development of system hardware realization technique as the main issue and exploit Verilog hardware description language to complete the design of Convolutional encoder/Viterbi decoder, Mapper/Demapper and FFT/IFFT which all meet the timing pulse specifications of WLAN802.11a. In this paper we use Trace back architecture in Viterbi decoder design and 64 points of FFT/IFFT algorithm with radix 22 SDF architecture and control the connecting timing pulses between Mapper/Demapper and FFT/IFFT within 4s of the same required sampling instant for the Mapper and Guard Interval to complete the desired transmission. In addition we will examine the effect due to finite bit length to determine the required bit length to have the minimum truncation errors. We emphasize in the hardware design. We utilize the Pathfinder hardware developed by Galaxy Far East Corp Company as our simulation platform and use Co-emulation method to verify and realize WLAN Orthogonal Frequency Division Baseband Transceiver system.
Keywords: Orthogonal Frequency Division Multiplex (OFDM), Fast Fourier Transform (FFT), Viterbi, Co-emulation, Pathfinder
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