Optimal Test Access Mechanism (TAM) for Reducing Test Application Time of Core-Based SOCs

Jiann-Chyi Rau  ¹, Po-Han Wu¹, Wnag-Tiao Huang¹, Chih-Lung Chien¹ and Chien-Shiun Chen¹

¹Department of Electrical Engineering, Tamkang University, Tamsui, Taiwan 251, R.O.C.

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